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Great Microprocessors of the Past and Present (V 13.4.0)

Great Microprocessors of the Past and Present (V 13.4.0)

last major update: May 2003
last minor update: December 2003
More CPU info (Including WWW sites of some companies mentioned here)
can be found at The CPU Info Center:
http://bwrc.eecs.berkeley.edu/CIC/

More detailed documentation of microprocessor instructions sets
can be found at Microprocessor instruction set cards:
http://www.comlab.ox.ac.uk/archive/cards.html

A very detailed (and much more accurate) chronology of microcomputer
history can be found at Chronology of Events in the History of Microcomputers:
http://www.islandnet.com/~kpolsson/comphist/

A list of architects, and some architecture descriptions which are
more detailed (and probably accurate) than those found here is available
at Mark Smotherman’s list of Recent Computer Architects:
http://www.cs.clemson.edu/~mark/architects.html.
More computer innovators can be found at The History Of Modern Computers
And Their Inventors:

http://inventors.about.com/education/inventors/library/blcoindex.htm

An online dictionary of computing terms you might find on this page
can be found at the Free On-line Dictionary of Computing:
http://wombat.doc.ic.ac.uk/
Or one of it’s many mirror sites

Feel free to send me comments at:
john.bayko@sasktel.net

Introduction: What’s a “Great CPU”?

This list is not intended to be an exhaustive compilation of microprocessors,
but rather a description of designs that are either unique (such as
the RCA 1802, Acorn ARM, or INMOS Transputer), or representative designs
typical of the period (such as the 6502 or 8080, 68000, and R2000).
Not necessarily the first of their kind, or the best.

A microprocessor generally means a CPU on a single silicon chip,
but exceptions have been made (and are documented) when the CPU includes
particularly interesting design ideas, and is generally the result
of the microprocessor design philosophy. However, towards the more
modern designs, design from other fields overlap, and this criterion
becomes rather fuzzy. In addition, parts that used to be separate
(FPU, MMU) are now usually considered part of the CPU design.

Another note on terminology – because of the muddling of the term
“RISC” by marketroids, I’ve avoided using those terms here to refer
to architectures. And anyway, there are in fact four architecture
families, not two. So I use “memory-data” and “load-store” to refer
to CISC and RISC architectures. This file is not intended as a reference
work, though all attempts (well, many attempts) have been made to
ensure its accuracy. It includes material from text books, magazine
articles and papers, authoritative descriptions and half remembered
folklore from obscure sources (and net.people who I’d like to thank
for their many helpful comments). As such, it has no bibliography
or list of references.

In other words, “For entertainment use only”.

Enjoy, criticize, distribute and quote from this list freely.

By: John Bayko (Tau).
Internet: john.bayko@sk.sympatico.ca

An explanation of the version numbers:

##.##.##
 |  |  |
 |  |  +-- small, usually 2 sentences or less.
 |  +--- changes a paragraph or more, or several descriptions
 +---- CPU added or deleted.

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